Op deze site:
http://www.jc-news.com/parse.cgi?pc/tech/cpus//K75 las ik het volgende over de Athlon:
AMD "K75" Athlon
Features
* MMX instructions
* 3DNow! instructions
* Integer/prefetching subset of SSE instructions
* Additional instructions useful to Digital Signal Processing (DSP)
L1 cache
* 2-way (?) set associative
* 64KB Instruction
* 64KB Data
L2 cache
* 512KB Unified
* 4-way (?) set associative
* high latency (separate SRAM chips)
* 64-bits wide
* running at 1/2x, 2/5x, or 1/3x cpu frequency
Process
* cs50 (Austin FAB25, 180nm with aluminum interconnects)
* Die = 102sqmm
Nu las ik daar ook het volgende over de Thunderbird:
AMD "Thunderbird" Athlon
Variant of the Athlon processor brand, which is based on AMD''s K7 core.
The Thunderbird contains the following distinguising features:
Features
* MMX instructions
* 3DNow! instructions
* Integer/prefetching subset of SSE instructions
L1 cache
* 3 cycle latency
* 64KB Instruction
* 64KB Data
L2 cache
* 256KB
* 16-way set associative
* Exclusive (added hit rate and associativity)
* uncertain latency (AMD claims 11 cycles, cache walking programs assert ~20 cycles -- later revealed that the latency varies between these extremes depending on the load and circumstance)
* dual ported (?) 64-bits wide
* running at cpu frequency
Process
* lower MHz parts, CS50 (Austin FAB25, aluminum interconnects)
* higher MHz parts, HiP6L (Dresden FAB30, copper interconnects) -- all 1.10GHz parts made on this process
* Die = 120sqmm
Nu vroeg ik mij af wat er met de Additional instructions useful to Digital Signal Processing (DSP) gebeurt is in de huidige Thunderbird Core aangezien deze er niet meer bijstaan....
Iemand enig idee waarom ze deze instructies verwijderd hebben?
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