Ik heb een dual cellie 500
@566 met 2.3v werkt alles goed zet ik um op 600 dan krijg ik na verloop van tijd in win2k een blauw scherm met beginning psychical memory dump en dan gaat ie rebooten
Weet iemand of hier wat aan te doen is? Hier m'n geheugen info:
SPD dump of Dimm in socket :0
SPD - Number of bytes available :128 bytes
SPD - Total bytes of memory device :256 bytes
SPD - Revision :1.2
SPD - Checksum :OK
Manufacturer - Name :Unknown ID: 0000000000000000
Manufacturer - Location :0 ($00)
Manufacturer - Part Number :
Manufacturer - Revision code :00 ($0000)
Manufacturer - Manufacturing date :$0000
Manufacturer - Assembly Serial Number :0000
Manufacturer - Manufacturer Specific Data :
Memory - Type :Sync Dram
Memory - Row Addresses :0 | 12
Memory - Column Addresses :0 | 9
Memory - Module Banks :1
Memory - Data Width :64
Memory - Voltage interface standard :LVTTL
Memory - Cycle time at Max. Supported CAS :10.0 ns.
Memory - SDRAM Access from Clock at :6.0 ns.
Memory - DIMM Configuration type :None
Memory - Refresh Rate/Type :Self Refresh, Normal (15.625 us)
Memory - Minimum Clock Delay :1
Memory - Burst Lengths Supported :Page 1 2 4 8
Memory - Banks on Each SDRAM device :4
Memory - CAS Latencies Supported :2 3
Memory - CS Latencies Supported :0
Memory - WE Latencies Supported :0
Memory - Min. Clock Cycle Time @ CL X-1 :15.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-1
.0 ns.
Memory - Min. Clock Cycle Time @ CL X-2 :0.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-2 :0.0 ns.
Memory - Minimum Row Precharge Time :30 ns.
Memory - Minimum Row Active to Row Active delay :30 ns.
Memory - Minimum RAS to CAS delay :30 ns.
Memory - Minimum RAS Pulse Width :60 ns.
Memory - Module Bank Density :64 MB.
Memory - Module Total Density :64 MB.
Memory - Speed :100 Mhz
SPD dump of Dimm in socket :1
SPD - Number of bytes available :128 bytes
SPD - Total bytes of memory device :256 bytes
SPD - Revision :1.2
SPD - Checksum :OK
Manufacturer - Name :Unknown ID: 0000000000000000
Manufacturer - Location :0 ($00)
Manufacturer - Part Number :
Manufacturer - Revision code :00 ($0000)
Manufacturer - Manufacturing date :$FFFF
Manufacturer - Assembly Serial Number :255255255255
Manufacturer - Manufacturer Specific Data :
Memory - Type :Sync Dram
Memory - Row Addresses :0 | 12
Memory - Column Addresses :0 | 9
Memory - Module Banks :1
Memory - Data Width :64
Memory - Voltage interface standard :LVTTL
Memory - Cycle time at Max. Supported CAS :8.0 ns.
Memory - SDRAM Access from Clock at :6.0 ns.
Memory - DIMM Configuration type :None
Memory - Refresh Rate/Type :Self Refresh, Normal (15.625 us)
Memory - Minimum Clock Delay :1
Memory - Burst Lengths Supported :Page 1 2 4 8
Memory - Banks on Each SDRAM device :4
Memory - CAS Latencies Supported :2 3
Memory - CS Latencies Supported :0
Memory - WE Latencies Supported :0
Memory - Min. Clock Cycle Time @ CL X-1 :10.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-1 :6.0 ns.
Memory - Min. Clock Cycle Time @ CL X-2 :0.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-2 :0.0 ns.
Memory - Minimum Row Precharge Time :20 ns.
Memory - Minimum Row Active to Row Active delay :20 ns.
Memory - Minimum RAS to CAS delay :20 ns.
Memory - Minimum RAS Pulse Width :50 ns.
Memory - Module Bank Density :64 MB.
Memory - Module Total Density :64 MB.
Memory - Speed :125 Mhz
@566 met 2.3v werkt alles goed zet ik um op 600 dan krijg ik na verloop van tijd in win2k een blauw scherm met beginning psychical memory dump en dan gaat ie rebooten
SPD dump of Dimm in socket :0
SPD - Number of bytes available :128 bytes
SPD - Total bytes of memory device :256 bytes
SPD - Revision :1.2
SPD - Checksum :OK
Manufacturer - Name :Unknown ID: 0000000000000000
Manufacturer - Location :0 ($00)
Manufacturer - Part Number :
Manufacturer - Revision code :00 ($0000)
Manufacturer - Manufacturing date :$0000
Manufacturer - Assembly Serial Number :0000
Manufacturer - Manufacturer Specific Data :
Memory - Type :Sync Dram
Memory - Row Addresses :0 | 12
Memory - Column Addresses :0 | 9
Memory - Module Banks :1
Memory - Data Width :64
Memory - Voltage interface standard :LVTTL
Memory - Cycle time at Max. Supported CAS :10.0 ns.
Memory - SDRAM Access from Clock at :6.0 ns.
Memory - DIMM Configuration type :None
Memory - Refresh Rate/Type :Self Refresh, Normal (15.625 us)
Memory - Minimum Clock Delay :1
Memory - Burst Lengths Supported :Page 1 2 4 8
Memory - Banks on Each SDRAM device :4
Memory - CAS Latencies Supported :2 3
Memory - CS Latencies Supported :0
Memory - WE Latencies Supported :0
Memory - Min. Clock Cycle Time @ CL X-1 :15.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-1
Memory - Min. Clock Cycle Time @ CL X-2 :0.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-2 :0.0 ns.
Memory - Minimum Row Precharge Time :30 ns.
Memory - Minimum Row Active to Row Active delay :30 ns.
Memory - Minimum RAS to CAS delay :30 ns.
Memory - Minimum RAS Pulse Width :60 ns.
Memory - Module Bank Density :64 MB.
Memory - Module Total Density :64 MB.
Memory - Speed :100 Mhz
SPD dump of Dimm in socket :1
SPD - Number of bytes available :128 bytes
SPD - Total bytes of memory device :256 bytes
SPD - Revision :1.2
SPD - Checksum :OK
Manufacturer - Name :Unknown ID: 0000000000000000
Manufacturer - Location :0 ($00)
Manufacturer - Part Number :
Manufacturer - Revision code :00 ($0000)
Manufacturer - Manufacturing date :$FFFF
Manufacturer - Assembly Serial Number :255255255255
Manufacturer - Manufacturer Specific Data :
Memory - Type :Sync Dram
Memory - Row Addresses :0 | 12
Memory - Column Addresses :0 | 9
Memory - Module Banks :1
Memory - Data Width :64
Memory - Voltage interface standard :LVTTL
Memory - Cycle time at Max. Supported CAS :8.0 ns.
Memory - SDRAM Access from Clock at :6.0 ns.
Memory - DIMM Configuration type :None
Memory - Refresh Rate/Type :Self Refresh, Normal (15.625 us)
Memory - Minimum Clock Delay :1
Memory - Burst Lengths Supported :Page 1 2 4 8
Memory - Banks on Each SDRAM device :4
Memory - CAS Latencies Supported :2 3
Memory - CS Latencies Supported :0
Memory - WE Latencies Supported :0
Memory - Min. Clock Cycle Time @ CL X-1 :10.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-1 :6.0 ns.
Memory - Min. Clock Cycle Time @ CL X-2 :0.0 ns.
Memory - Max. Data Access Time from Clock @ CL X-2 :0.0 ns.
Memory - Minimum Row Precharge Time :20 ns.
Memory - Minimum Row Active to Row Active delay :20 ns.
Memory - Minimum RAS to CAS delay :20 ns.
Memory - Minimum RAS Pulse Width :50 ns.
Memory - Module Bank Density :64 MB.
Memory - Module Total Density :64 MB.
Memory - Speed :125 Mhz